Intel(R) Threading Building Blocks Doxygen Documentation
version 4.2.3
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#include <stdint.h>
#include <ia64intrin.h>
Go to the source code of this file.
Namespaces | |
tbb | |
The graph class. | |
tbb::internal | |
Identifiers declared inside namespace internal should never be used directly by client code. | |
#define __TBB_acquire_consistency_helper | ( | ) | __TBB_compiler_fence() |
Definition at line 40 of file linux_ia64.h.
#define __TBB_compiler_fence | ( | ) | __asm__ __volatile__("": : :"memory") |
Definition at line 36 of file linux_ia64.h.
#define __TBB_control_consistency_helper | ( | ) | __TBB_compiler_fence() |
Definition at line 37 of file linux_ia64.h.
#define __TBB_ENDIANNESS __TBB_ENDIAN_LITTLE |
Definition at line 27 of file linux_ia64.h.
#define __TBB_full_memory_fence | ( | ) | __asm__ __volatile__("mf": : :"memory") |
Definition at line 42 of file linux_ia64.h.
#define __TBB_LockByte | ( | P | ) | __TBB_machine_lockbyte(P) |
Definition at line 173 of file linux_ia64.h.
#define __TBB_Log2 | ( | V | ) | __TBB_machine_lg(V) |
Definition at line 177 of file linux_ia64.h.
#define __TBB_machine_cmpswp1full_fence __TBB_machine_cmpswp1__TBB_full_fence |
Definition at line 125 of file linux_ia64.h.
#define __TBB_machine_cmpswp1relaxed __TBB_machine_cmpswp1acquire |
Definition at line 141 of file linux_ia64.h.
#define __TBB_machine_cmpswp2full_fence __TBB_machine_cmpswp2__TBB_full_fence |
Definition at line 126 of file linux_ia64.h.
#define __TBB_machine_cmpswp2relaxed __TBB_machine_cmpswp2acquire |
Definition at line 142 of file linux_ia64.h.
#define __TBB_machine_cmpswp4full_fence __TBB_machine_cmpswp4__TBB_full_fence |
Definition at line 127 of file linux_ia64.h.
#define __TBB_machine_cmpswp4relaxed __TBB_machine_cmpswp4acquire |
Definition at line 143 of file linux_ia64.h.
#define __TBB_machine_cmpswp8full_fence __TBB_machine_cmpswp8__TBB_full_fence |
Definition at line 128 of file linux_ia64.h.
#define __TBB_machine_cmpswp8relaxed __TBB_machine_cmpswp8acquire |
Definition at line 144 of file linux_ia64.h.
#define __TBB_MACHINE_DEFINE_ATOMICS | ( | S, | |
V | |||
) |
Definition at line 146 of file linux_ia64.h.
#define __TBB_machine_fetchadd1full_fence __TBB_machine_fetchadd1__TBB_full_fence |
Definition at line 117 of file linux_ia64.h.
#define __TBB_machine_fetchadd1relaxed __TBB_machine_fetchadd1acquire |
On IA64 RMW operations implicitly have acquire semantics. Thus one cannot actually have completely relaxed RMW operation here.
Definition at line 133 of file linux_ia64.h.
#define __TBB_machine_fetchadd2full_fence __TBB_machine_fetchadd2__TBB_full_fence |
Definition at line 118 of file linux_ia64.h.
#define __TBB_machine_fetchadd2relaxed __TBB_machine_fetchadd2acquire |
Definition at line 134 of file linux_ia64.h.
#define __TBB_machine_fetchadd4full_fence __TBB_machine_fetchadd4__TBB_full_fence |
Definition at line 119 of file linux_ia64.h.
#define __TBB_machine_fetchadd4relaxed __TBB_machine_fetchadd4acquire |
Definition at line 135 of file linux_ia64.h.
#define __TBB_machine_fetchadd8full_fence __TBB_machine_fetchadd8__TBB_full_fence |
Definition at line 120 of file linux_ia64.h.
#define __TBB_machine_fetchadd8relaxed __TBB_machine_fetchadd8acquire |
Definition at line 136 of file linux_ia64.h.
#define __TBB_machine_fetchstore1full_fence __TBB_machine_fetchstore1__TBB_full_fence |
Definition at line 121 of file linux_ia64.h.
#define __TBB_machine_fetchstore1relaxed __TBB_machine_fetchstore1acquire |
Definition at line 137 of file linux_ia64.h.
#define __TBB_machine_fetchstore2full_fence __TBB_machine_fetchstore2__TBB_full_fence |
Definition at line 122 of file linux_ia64.h.
#define __TBB_machine_fetchstore2relaxed __TBB_machine_fetchstore2acquire |
Definition at line 138 of file linux_ia64.h.
#define __TBB_machine_fetchstore4full_fence __TBB_machine_fetchstore4__TBB_full_fence |
Definition at line 123 of file linux_ia64.h.
#define __TBB_machine_fetchstore4relaxed __TBB_machine_fetchstore4acquire |
Definition at line 139 of file linux_ia64.h.
#define __TBB_machine_fetchstore8full_fence __TBB_machine_fetchstore8__TBB_full_fence |
Definition at line 124 of file linux_ia64.h.
#define __TBB_machine_fetchstore8relaxed __TBB_machine_fetchstore8acquire |
Definition at line 140 of file linux_ia64.h.
#define __TBB_Pause | ( | V | ) | __TBB_machine_pause(V) |
Definition at line 176 of file linux_ia64.h.
#define __TBB_release_consistency_helper | ( | ) | __TBB_compiler_fence() |
Definition at line 41 of file linux_ia64.h.
#define __TBB_TryLockByte | ( | P | ) | __TBB_machine_trylockbyte(P) |
Definition at line 172 of file linux_ia64.h.
#define __TBB_USE_FENCED_ATOMICS 1 |
Definition at line 167 of file linux_ia64.h.
#define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1 |
Definition at line 168 of file linux_ia64.h.
#define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1 |
Definition at line 169 of file linux_ia64.h.
#define __TBB_WORDSIZE 8 |
Definition at line 26 of file linux_ia64.h.
void* __TBB_get_bsp | ( | ) |
Retrieves the current RSE backing store pointer. IA64 specific.
Referenced by tbb::internal::generic_scheduler::can_steal(), and tbb::internal::generic_scheduler::init_stack_info().
int8_t __TBB_machine_cmpswp1__TBB_full_fence | ( | volatile void * | ptr, |
int8_t | value, | ||
int8_t | comparand | ||
) |
int8_t __TBB_machine_cmpswp1acquire | ( | volatile void * | ptr, |
int8_t | value, | ||
int8_t | comparand | ||
) |
int8_t __TBB_machine_cmpswp1release | ( | volatile void * | ptr, |
int8_t | value, | ||
int8_t | comparand | ||
) |
int16_t __TBB_machine_cmpswp2__TBB_full_fence | ( | volatile void * | ptr, |
int16_t | value, | ||
int16_t | comparand | ||
) |
int16_t __TBB_machine_cmpswp2acquire | ( | volatile void * | ptr, |
int16_t | value, | ||
int16_t | comparand | ||
) |
int16_t __TBB_machine_cmpswp2release | ( | volatile void * | ptr, |
int16_t | value, | ||
int16_t | comparand | ||
) |
int32_t __TBB_machine_cmpswp4__TBB_full_fence | ( | volatile void * | ptr, |
int32_t | value, | ||
int32_t | comparand | ||
) |
int32_t __TBB_machine_cmpswp4acquire | ( | volatile void * | ptr, |
int32_t | value, | ||
int32_t | comparand | ||
) |
int32_t __TBB_machine_cmpswp4release | ( | volatile void * | ptr, |
int32_t | value, | ||
int32_t | comparand | ||
) |
int64_t __TBB_machine_cmpswp8__TBB_full_fence | ( | volatile void * | ptr, |
int64_t | value, | ||
int64_t | comparand | ||
) |
int64_t __TBB_machine_cmpswp8acquire | ( | volatile void * | ptr, |
int64_t | value, | ||
int64_t | comparand | ||
) |
int64_t __TBB_machine_cmpswp8release | ( | volatile void * | ptr, |
int64_t | value, | ||
int64_t | comparand | ||
) |
int8_t __TBB_machine_fetchadd1__TBB_full_fence | ( | volatile void * | ptr, |
int8_t | addend | ||
) |
int8_t __TBB_machine_fetchadd1acquire | ( | volatile void * | ptr, |
int8_t | addend | ||
) |
int8_t __TBB_machine_fetchadd1release | ( | volatile void * | ptr, |
int8_t | addend | ||
) |
int16_t __TBB_machine_fetchadd2__TBB_full_fence | ( | volatile void * | ptr, |
int16_t | addend | ||
) |
int16_t __TBB_machine_fetchadd2acquire | ( | volatile void * | ptr, |
int16_t | addend | ||
) |
int16_t __TBB_machine_fetchadd2release | ( | volatile void * | ptr, |
int16_t | addend | ||
) |
int32_t __TBB_machine_fetchadd4__TBB_full_fence | ( | volatile void * | ptr, |
int32_t | value | ||
) |
int32_t __TBB_machine_fetchadd4acquire | ( | volatile void * | ptr, |
int32_t | addend | ||
) |
int32_t __TBB_machine_fetchadd4release | ( | volatile void * | ptr, |
int32_t | addend | ||
) |
int64_t __TBB_machine_fetchadd8__TBB_full_fence | ( | volatile void * | ptr, |
int64_t | value | ||
) |
int64_t __TBB_machine_fetchadd8acquire | ( | volatile void * | ptr, |
int64_t | addend | ||
) |
int64_t __TBB_machine_fetchadd8release | ( | volatile void * | ptr, |
int64_t | addend | ||
) |
int8_t __TBB_machine_fetchstore1__TBB_full_fence | ( | volatile void * | ptr, |
int8_t | value | ||
) |
int8_t __TBB_machine_fetchstore1acquire | ( | volatile void * | ptr, |
int8_t | value | ||
) |
int8_t __TBB_machine_fetchstore1release | ( | volatile void * | ptr, |
int8_t | value | ||
) |
int16_t __TBB_machine_fetchstore2__TBB_full_fence | ( | volatile void * | ptr, |
int16_t | value | ||
) |
int16_t __TBB_machine_fetchstore2acquire | ( | volatile void * | ptr, |
int16_t | value | ||
) |
int16_t __TBB_machine_fetchstore2release | ( | volatile void * | ptr, |
int16_t | value | ||
) |
int32_t __TBB_machine_fetchstore4__TBB_full_fence | ( | volatile void * | ptr, |
int32_t | value | ||
) |
int32_t __TBB_machine_fetchstore4acquire | ( | volatile void * | ptr, |
int32_t | value | ||
) |
int32_t __TBB_machine_fetchstore4release | ( | volatile void * | ptr, |
int32_t | value | ||
) |
int64_t __TBB_machine_fetchstore8__TBB_full_fence | ( | volatile void * | ptr, |
int64_t | value | ||
) |
int64_t __TBB_machine_fetchstore8acquire | ( | volatile void * | ptr, |
int64_t | value | ||
) |
int64_t __TBB_machine_fetchstore8release | ( | volatile void * | ptr, |
int64_t | value | ||
) |
int64_t __TBB_machine_lg | ( | uint64_t | value | ) |
int32_t __TBB_machine_load1_relaxed | ( | const void * | ptr | ) |
int32_t __TBB_machine_load2_relaxed | ( | const void * | ptr | ) |
int32_t __TBB_machine_load4_relaxed | ( | const void * | ptr | ) |
int64_t __TBB_machine_load8_relaxed | ( | const void * | ptr | ) |
int64_t __TBB_machine_lockbyte | ( | volatile unsigned char & | ptr | ) |
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inline |
bool __TBB_machine_trylockbyte | ( | volatile unsigned char & | ptr | ) |