17 #if !defined(__TBB_machine_H) || defined(__TBB_machine_linux_intel64_H)    18 #error Do not #include this internal file directly; use public TBB headers instead.    21 #define __TBB_machine_linux_intel64_H    26 #define __TBB_WORDSIZE 8    27 #define __TBB_ENDIANNESS __TBB_ENDIAN_LITTLE    29 #define __TBB_compiler_fence() __asm__ __volatile__("": : :"memory")    30 #define __TBB_control_consistency_helper() __TBB_compiler_fence()    31 #define __TBB_acquire_consistency_helper() __TBB_compiler_fence()    32 #define __TBB_release_consistency_helper() __TBB_compiler_fence()    34 #ifndef __TBB_full_memory_fence    35 #define __TBB_full_memory_fence() __asm__ __volatile__("mfence": : :"memory")    38 #define __TBB_MACHINE_DEFINE_ATOMICS(S,T,X)                                          \    39 static inline T __TBB_machine_cmpswp##S (volatile void *ptr, T value, T comparand )  \    43     __asm__ __volatile__("lock\ncmpxchg" X " %2,%1"                                  \    44                           : "=a"(result), "=m"(*(volatile T*)ptr)                    \    45                           : "q"(value), "0"(comparand), "m"(*(volatile T*)ptr)       \    50 static inline T __TBB_machine_fetchadd##S(volatile void *ptr, T addend)              \    53     __asm__ __volatile__("lock\nxadd" X " %0,%1"                                     \    54                           : "=r"(result),"=m"(*(volatile T*)ptr)                     \    55                           : "0"(addend), "m"(*(volatile T*)ptr)                      \    60 static inline  T __TBB_machine_fetchstore##S(volatile void *ptr, T value)            \    63     __asm__ __volatile__("lock\nxchg" X " %0,%1"                                     \    64                           : "=r"(result),"=m"(*(volatile T*)ptr)                     \    65                           : "0"(value), "m"(*(volatile T*)ptr)                       \    75 #undef __TBB_MACHINE_DEFINE_ATOMICS    78     __asm__ __volatile__(
"lock\norq %1,%0" : 
"=m"(*(
volatile uint64_t*)ptr) : 
"r"(
value), 
"m"(*(
volatile uint64_t*)ptr) : 
"memory");
    82     __asm__ __volatile__(
"lock\nandq %1,%0" : 
"=m"(*(
volatile uint64_t*)ptr) : 
"r"(
value), 
"m"(*(
volatile uint64_t*)ptr) : 
"memory");
    85 #define __TBB_AtomicOR(P,V) __TBB_machine_or(P,V)    86 #define __TBB_AtomicAND(P,V) __TBB_machine_and(P,V)    88 #define __TBB_USE_FETCHSTORE_AS_FULL_FENCED_STORE           1    89 #define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE            1    90 #define __TBB_USE_GENERIC_RELAXED_LOAD_STORE                1    91 #define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1 #define __TBB_MACHINE_DEFINE_ATOMICS(S, T, X)
 
static void __TBB_machine_and(volatile void *ptr, uint64_t value)
 
static void __TBB_machine_or(volatile void *ptr, uint64_t value)
 
void const char const char int ITT_FORMAT __itt_group_sync x void const char ITT_FORMAT __itt_group_sync s void ITT_FORMAT __itt_group_sync p void ITT_FORMAT p void ITT_FORMAT p no args __itt_suppress_mode_t unsigned int void size_t ITT_FORMAT d void ITT_FORMAT p void ITT_FORMAT p __itt_model_site __itt_model_site_instance ITT_FORMAT p __itt_model_task __itt_model_task_instance ITT_FORMAT p void ITT_FORMAT p void ITT_FORMAT p void size_t ITT_FORMAT d void ITT_FORMAT p const wchar_t ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s no args void ITT_FORMAT p size_t ITT_FORMAT d no args const wchar_t const wchar_t ITT_FORMAT s __itt_heap_function void size_t int ITT_FORMAT d __itt_heap_function void ITT_FORMAT p __itt_heap_function void void size_t int ITT_FORMAT d no args no args unsigned int ITT_FORMAT u const __itt_domain __itt_id ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain __itt_id ITT_FORMAT p const __itt_domain __itt_id __itt_timestamp __itt_timestamp ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain ITT_FORMAT p const __itt_domain __itt_string_handle unsigned long long value